Logo image
0.18um BCD technology with best-in-class LDMOS from 6 v to 45 v
Conference paper

0.18um BCD technology with best-in-class LDMOS from 6 v to 45 v

Tsung-Yi Huang, Wen-Yi Liao, Ching-Yao Yang, Chien-Hao Huang, Wang-Chi Vincent Yeh, Chih-Fang Huang, Kuo-Hsuan Lo, Chien-Wei Chiu, Tzu-Cheng Kao, Hung-Der Su, …
Proceedings of the International Symposium on Power Semiconductor Devices and ICs, pp.179-181
2014

Abstract

Engineering (all)
We propose a novel nLDMOS structure and a design concept in BCD technology with the best-in-class performance. The drift profile is optimized and the multi-oxide in the drift region is adopted to approach the RESURF limit of on-resistance vs. BVdss characteristic (i.e., 36V DMOS has a Ron-sp of 20mohm-mm2 with a BVdss of 50V; 45V DMOS has a Ron-sp of 28mohm-mm2 with a BVdss of 65V). Moreover, this modification requires merely three extra masks in the Non-Epitaxy LV process to achieve this improvement. Therefore it is not only a high performance but also a low cost solution. © 2014 IEEE.

Metrics

1 Record Views

Details

Logo image