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16nm FinFET DUV Detector Array in Fully Compatible FinFET Logic Process
Conference paper

16nm FinFET DUV Detector Array in Fully Compatible FinFET Logic Process

Wei-Hwa Lin, Jiaw-Ren Shih, Jonathan Chang, Yih Wang, Perng-Fei Yuh, Ya-Chin King and Chrong Jung Lin
2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings
2023
DOI: https://doi.org/10.1109/VLSI-TSA/VLSI-DAT57221.2023.10134105

Abstract

Artificial Intelligence Computer Networks and Communications Computer Science Applications Hardware and Architecture Information Systems Electrical and Electronic Engineering
A new 16nm FinFET 2T DUV light detector array is successfully fabricated and demonstrated in this paper. Based on the photoelectric effect in floating gate cell design, the new DUV detector features full CMOS process compatibility with non-volatile detected data storage. A brand new analytical model is also developed for resolving the sensitivity variation aroused from different fab-out initial states. With this model, the FinFET detector array can successfully sense the exposed DUV intensity and its distribution precisely.

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