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2.5D system synthesis methodology under performance, power and thermal constraints
Conference paper

2.5D system synthesis methodology under performance, power and thermal constraints

Chung-Han Chou, Zhi-Yang Wang, Tsui-Yun Chang, Shih-Hsu Huang and Shih-Chieh Chang
2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016, 7482545
05/2016

Abstract

Hardware and Architecture Electrical and Electronic Engineering Safety Risk Reliability and Quality Instrumentation
Although 2.5D IC, in which chips are connected via the interposer, can increase circuit density and performance, power dissipation and thermal effect become serious concerns for 2.5D IC design. Previous researches only focus on the power and thermal management of a single chip. Therefore, in the existing 2.5D IC design flow, the designer has no idea on the power budget of each chip. Based on this observation, in this paper, we propose the first approach to perform 2.5D system synthesis methodology under performance, power, and thermal constraints. Our approach can determine the process technology and the dynamic-voltage-frequency-scaling design for each chip at the system level. As a result, not only the performance, power, and temperature of the system can be properly controlled at the very early design stage, but also the design closure can be achieved with low manufacturing cost. Experiments with benchmark circuits consistently show that the proposed design methodology works well in practice.

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