32nm strained nitride MTP cell by fully CMOS logic compatible process

Wen Chao Shen; Chia-En Huang; Hsun Ouyang; Ya-Chin King; Chrong Jung Lin

doi:10.1109/VLSI-TSA.2012.6210147

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32nm strained nitride MTP cell by fully CMOS logic compatible process

Wen Chao Shen, Chia-En Huang, Hsun Ouyang, Ya-Chin King and Chrong Jung Lin

International Symposium on VLSI Technology, Systems, and Applications, Proceedings, 6210147

2012

DOI: https://doi.org/10.1109/VLSI-TSA.2012.6210147

Appears in keyword about Physics

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Electronic

Optical and Magnetic Materials

Condensed Matter Physics

Electrical and Electronic Engineering

A 32nm MTP cell with a nitride-based storage node using 32nm strained Si process are demonstrated with an ultra small cell size of 0.0528μm ² by a 32nm strained-CMOS fully logic compatible process. A self-aligned tiny nitride storage node is placed in the narrow spacing of two 32nm transistors by a merged transistor spacer mingled with a strained nitride of 32nm strained Si process. The twin-gate cell uses the source side injection (SSI) to obtain 100 times of on/off window by a low program voltage of 3.5V within 1msec. A good reliability in retention and disturb is exhibited due to the inherently decoupling of storage node and transistor gate oxide in this cell, even when gate oxide is thinner than 16Å with 32nm gate length only. © 2012 IEEE.

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Title: 32nm strained nitride MTP cell by fully CMOS logic compatible process
Translated title: 32nm strained nitride MTP cell by fully CMOS logic compatible process
Creators - without role: Wen Chao Shen - National Tsing Hua University
Chia-En Huang - National Tsing Hua University
Hsun Ouyang - Microelectronics Laboratory , Institute of Electronics Engineering , National Tsing-Hua University
Ya-Chin King - Microelectronics Laboratory , Institute of Electronics Engineering , National Tsing-Hua University
Chrong Jung Lin - National Tsing Hua University
Publication Details: International Symposium on VLSI Technology, Systems, and Applications, Proceedings, 6210147
Identifiers: 9781457720840; 9957768356306774
Academic Unit: Institute of Electronics Engineering, College of Electrical Engineering and Computer Science, National Tsing Hua University
Language: English
Resource Type: Conference paper

32nm strained nitride MTP cell by fully CMOS logic compatible process

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