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3D integration opportunities, issues, and solutions: A designer's perspective
Conference paper

3D integration opportunities, issues, and solutions: A designer's perspective

Ding-Ming Kwai and Cheng-Wen Wu
Proceedings of SPIE - The International Society for Optical Engineering, Vol.7520, 752003
2009

Abstract

3D integration 3D packaging System-on-chip (SOC) Three-dimensional integrated circuit (3D IC) Through-silicon-stack (TSS) Through-silicon-via (TSV) Electronic Optical and Magnetic Materials,Condensed Matter Physics,Computer Science Applications,Applied Mathematics,Electrical and Electronic Engineering
As the development cost of a typical system-on-chip (SOC) using state-of-the-art technology soars, more and more people turn to three-dimensional (3D) integration for possible alternatives that provide better or equal performance with lower cost. Stacking dies using the through-silicon-via (TSV) technology has been considered one of the most promising solutions to extending the life of Moore's law in semiconductor industry, but of course there are problems to be solved before the infrastructure can be set up to support the industry for manufacturing TSV-based 3D integrated devices. In this paper we will discuss the opportunities, design and manufacturing issues, and possible solutions for 3D integrated devices, from a designer's perspective. © 2009 Copyright SPIE - The International Society for Optical Engineering.

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