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40-Gb/s transimpedance amplifier in 0.18-μm CMOS technology
Conference paper

40-Gb/s transimpedance amplifier in 0.18-μm CMOS technology

Jun-De Jin and Shawn S. H. Hsu
ESSCIRC 2006 - Proceedings of the 32nd European Solid-State Circuits Conference, pp.520-523
2006

Abstract

A 40-Gb/s transimpedance amplifier (TIA) is realized in 0.18-μm CMOS technology. From the measured Sparameters, a transimpedance gain of 51.0 dBΩ and a 3-dB bandwidth up to 30.5 GHz ( ∼ 0.5 f T ) were observed. To the best of authors' knowledge, the TIA presents the widest bandwidth and highest GBP/P dc of 180.1 GHzΩ/mW among the published results with similar technologies. A new bandwidth enhancement technique, π-type inductor peaking (PIP), is proposed, which gives a bandwidth enhancement factor of 3.31 without disturbing the low-frequency gain. Under a 1.8 V supply voltage, the TIA consumes 60.1 mW with a chip area of 1.17 × 0.46 mm 2 . © 2006 IEEE.

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