Abstract
Noise Shaping SAR (NS-SAR) ADC is an emerging architecture which can achieve power efficiency and high resolution simultaneously by combining the advantages of SAR operation and delta-sigma modulation. The prior residue process can be classified into two types: passive and active. For passive residue process, switching capacitor (SC) finite-impulse-response (FIR) filter [1] [2] is implemented with low power consumption. However, the passive approach suffers from the gain loss of charge sharing operation and the resulting NTF is mild. For active residue process, an active gain stage is implemented to compensate the gain loss and improve the NTF with a better noise suppression. However, the required amplifier for active approach is usually power consuming. Using open-loop dynamic amplifier [3] [4] is a compromised active solution for gain loss and power consumption, but, its gain is PVT sensitive and needs calibration with increasing design complexity. Closed-loop dynamic amplifier is reported to achieve a high PVT robustness [5], however, the multi-stage high-gain floating-inverter-based amplifier is needed to minimize the finite gain error with considerable settling time and power consumption requirement.