- 題名
- A 16nm 216kb, 188.4TOPS/W and 133.5TFLOPS/W Microscaling Multi-Mode Gain-Cell CIM Macro Edge-AI Devices
- 創作者：
- Win San Khwa - Taiwan Semiconductor Manufacturing Company (China)Ping Chun Wu - National Tsing Hua UniversityJian Wei Su - Industrial Technology Research InstituteChiao Yen Cheng - National Tsing Hua UniversityJun Ming Hsu - National Tsing Hua University, Hsinchu, TaiwanYu Chen Chen - National Tsing Hua University, Hsinchu, TaiwanLe Jung Hsieh - National Tsing Hua UniversityJyun Cheng Bai - National Tsing Hua UniversityYu Sheng Kao - National Tsing Hua UniversityTsung Han Lou - National Tsing Hua UniversityAshwin Sanjay Lele - Taiwan Semiconductor Manufacturing Company (United States)Jui Jen Wu - National Tsing Hua UniversityJen Chun Tien - National Tsing Hua UniversityChung Chuan Lo - National Tsing Hua UniversityRen Shuo Liu - 國立清華大學, 半導體研究學院Chih Cheng Hsieh - 國立清華大學, 半導體研究學院Kea Tiong Tang - 國立清華大學, 半導體研究學院Meng Fan Chang - National Tsing Hua University, Hsinchu, Taiwan
- 會議
- 2025 IEEE International Solid-State Circuits Conference (ISSCC) (San Francisco, CA, USA, 16/02/2025–20/02/2025)
- 補助款備註
- National Science and Technology Council (http://data.elsevier.com/vocabulary/SciValFunders/100020595) TSMC-NTHU
- 學術資源類型
- 會議論文
- 出版日期
- 2025
- 出版資訊
- Digest of technical papers - IEEE International Solid-State Circuits Conference
- 語言
- 英語
會議論文
A 16nm 216kb, 188.4TOPS/W and 133.5TFLOPS/W Microscaling Multi-Mode Gain-Cell CIM Macro Edge-AI Devices
Digest of technical papers - IEEE International Solid-State Circuits Conference
2025 IEEE International Solid-State Circuits Conference (ISSCC) (San Francisco, CA, USA, 16/02/2025–20/02/2025)
2025
指標
1 檢視次數