A 16nm 231mW Channel MLP Optimized Neural Processing Unit for 80.3% Top-1 ImageNet Classification Accuracy at 102fps

Conference paper

朝宗黃, 永泰陳, 泓全廖, 惠芸蔡 and 愷峰張

IEEE Asian Solid-State Circuits Conference (ASSCC)

2024

Abstract

AI accelerator

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Title: A 16nm 231mW Channel MLP Optimized Neural Processing Unit for 80.3% Top-1 ImageNet Classification Accuracy at 102fps
Creators - without role: 朝宗黃
永泰陳 - 國立清華大學
泓全廖 - 國立清華大學
惠芸蔡 - 國立清華大學
愷峰張 - 國立清華大學
Publication Details: IEEE Asian Solid-State Circuits Conference (ASSCC)
Identifiers: 9957767548706774
Academic Unit: Department of Electrical Engineering, College of Electrical Engineering and Computer Science, National Tsing Hua University
Language: English
Resource Type: Conference paper