Abstract
This paper presents a low power, high frame rate, 64×64 analog pre-processing smart CMOS imager with two operation modes as asynchronous target tracking and object edge-detection. The array-level analog processing function is achieved by the floating-gate mechanism (FGM), tracking error reduction technique and a novel event-driven (ED) readout structure. A prototype chip was fabricated in 0.18um CMOS technology to demonstrate a real-time edge-detection and tracking CMOS imager with a frame rate of 14.28kfps, a tracking error of 0.5pixel, a barycenter tracking latency of 1us with the readout bandwidth of 140 bits/frame and a total chip power of 199.2uW. The operating supply of the whole system is 1V. The proposed smart imager chip provides a low-power, high-frame-rate, and low-coast smart imager solution suitable for biomedical monitoring and optical touch-panel. © 2013 IEEE.