Abstract
For the first time, 1T2R RRAM cell using PMOS selector is proposed and demonstrated with improved reset voltage and high density for embedded NVM. Hierarchical bit line and 3-state cell storage confine the associated sneaking current locally within a small zone and further suppress it by >90%. Self-adaptive write driver with current limiter and sneaking current compensator realizes power saving and accurate current compliance for set. To suit PMOS selector, reverse read using current sensing with dummy reference brings fast and reliable read. A 1.5Mb RRAM test chip in 28nm improved the record storage density by 40% to 14.8 Mb/mm <sup>2</sup> . Reliable read is performed at low VDD of 0.6V(-40, 125)°C.