Abstract
The authors describe a 4-Mb NAND-EEPROM with tight V t (threshold voltage) distribution which is controlled by a novel program verify technique. A tight V t distribution width of 0.6 V for the entire 4-Mb cell array is achieved, and read margin is improved. A unique twin P-well structure has made it possible to realize low-power 5-V-only erase/program operation easily compared with the previous design.