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A 40nm fully functional SRAM with BL swing and WL pulse measurement scheme for eliminating a need for additional sensing tolerance margins
Conference paper

A 40nm fully functional SRAM with BL swing and WL pulse measurement scheme for eliminating a need for additional sensing tolerance margins

Yen-Huei Chen, Shao-Yu Chou, Quincy Lee, Wei-Min Chan, Dar Sun, Hung-Jen Liao, Ping Wang, Meng-Fan Chang and Hiroyuki Yamauchi
IEEE Symposium on VLSI Circuits, Digest of Technical Papers, pp.70-71
2011

Abstract

A method for direct measurements of bit-line (BL) swing, sense amplifier (SA) offset and word-line (WL) pulse width is demonstrated in a 40nm CMOS 32kb fully functional SRAM macro with <2% area penalty. This allows, for the first time, deciding the best tuning option for WL-pulse (WLP) width based on the results being measured on site for BL swing and dynamic read/write stability (DRWS), which both depend on WLP width. It has enabled to eliminate a need of additional margin for BL swing, which was conventionally needed for ensuring tolerance against its simulation errors and inaccurate SA-offset estimation. As a result, it was found that more aggressive option for WLP width could be chosen while ensuring the target BL swing. © 2011 JSAP (Japan Society of Applied Physi.

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