Abstract
This paper presents a 50-Gb/s voltage-mode transmitter incorporating quarter-rate clocking and 3-tap feedforward equalizer (FFE). The proposed CMOS 4:1 multiplexer driven by four differential 25 % -duty-cycle clocks obviates the use of cascading/stacking devices. Along with the resistive-feedback pre-driver, the bandwidth is improved significantly. Designed and fabricated in 40-nm CMOS process, the transmitter achieves 50-Gb/s maximum data rate under chip-on-board assembly. The measured differential eye-opening is 210 mV under measurement loss of 5.2 dB. The measured rms and peak-to-peak data jitter are 558 fs and 3.73 ps, respectively. The transmitter dissipates 208 mW of power from a 1-V supply. With the phase/duty-cycle calibration technique, the horizontal eye distortion is less than 2%.