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A 6.5kv ESD-protected low noise amplifier in 65-Nm CMOS
Conference paper

A 6.5kv ESD-protected low noise amplifier in 65-Nm CMOS

Ming-Hsien Tsai, Fu-Lung Hsueh, Chewn-Pu Jou, Ming-Hsiang Song, Jen-Chou Tseng, Shawn S.H. Hsu and Sean Chen
IEEE MTT-S International Microwave Symposium Digest, pp.485-488
2010

Abstract

CMOS ESD Low noise amplifier RF SCR TLP
A new ESD topology is proposed for RF low-noise amplifier (LNA). By using the modified silicon-controlled rectifier (MSCR) in conjunction with a P + /N-well diode clamp, a 5.8-GHz LNA with 6.5-kV ESD protection circuit is demonstrated by a 65-nm CMOS technology. Compared with the reference design, the new topology enhances the ESD level from 3.5 kV to 6.5 kV for human body model (HBM) while the noise figure (NF) is only 0.13 dB higher. Under a supply voltage of 1.2 V and drain current of 6.5 mA, the proposed ESD-protected LNA has a NF of 2.57 dB with an associated power gain of 16.7 dB. The input third-order intercept point (IIP3) is -11 dBm and the input and output return losses are below -15.9 dB and -20 dB, respectively. ©2010 IEEE.

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