A 65nm ReRAM-Enabled Nonvolatile Processor with 6X Reduction in Restore Time and 4X Higher Clock Frequency Using Adaptive Data Retention and Self-Write-Termination Nonvolatile Logic

Conference paper

Y. Liu, M.-F. Chang and H. Yang

IEEE International Solid-State Circuits Conference (ISSCC) Dig. Tech. Papers, Vol.59, p.84

2016

Abstract

ReRAM

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Title: A 65nm ReRAM-Enabled Nonvolatile Processor with 6X Reduction in Restore Time and 4X Higher Clock Frequency Using Adaptive Data Retention and Self-Write-Termination Nonvolatile Logic
Creators - without role: Y. Liu
M.-F. Chang - 國立清華大學電機資訊學院電機工程學系
H. Yang
Publication Details: IEEE International Solid-State Circuits Conference (ISSCC) Dig. Tech. Papers, Vol.59, p.84
Identifiers: 9.78147E+12; 9957775340706774
Academic Unit: Institute of Electronics Engineering, College of Electrical Engineering and Computer Science, National Tsing Hua University
Language: Traditional Chinese
Resource Type: Conference paper