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A 684Mbps 57mW joint QR decomposition and MIMO processor for 4x4 MIMO-OFDM systems
Conference paper

A 684Mbps 57mW joint QR decomposition and MIMO processor for 4x4 MIMO-OFDM systems

Po-Lin Chiu, Lin-Zheng Huang, Li-Wei Chai, Chun-Fu Liao and Yuan-Hao Huang
2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011, pp.309-312
2011

Abstract

This paper presents a configurable MIMO detector with QR decomposition and channel interpolation for 4x4 MIMO-OFDM systems. QR decomposition (QRD) processor and MIMO detector are usually investigated independently in the literature; however, this methodology usually limits operating condition to only slow fading channel. Therefore, this study jointly designs a hardware architecture for QR decomposition and MIMO detection without interface memory buffer, and the channel interpolation is also performed at the same time. This QR-based MIMO detector is implemented in a 90nm CMOS process with 2.02mm 2 core area. The chip consumes 56.8mW at 114MHz operating frequency with 1.0V supply and achieves 684Mbps throughput. The proposed chip, which performs one QRD and one MIMO detection for one OFDM symbol, is the first MIMO detector in the literature that supports real-time QR decomposition and MIMO detection for fast fading MIMO-OFDM systems. © 2011 IEEE.

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