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A 90nm 103.14 TOPS/W binary-weight spiking neural network CMOS ASIC for real-time object classification
Conference paper

A 90nm 103.14 TOPS/W binary-weight spiking neural network CMOS ASIC for real-time object classification

Po-Yao Chuang, Pai-Yu Tan, Cheng-Wen Wu and Juin-Ming Lu
Proceedings - Design Automation Conference, Vol.2020-July, 9218714
07/2020

Abstract

Visiting Assistant Research Fellow Convolution neural network Image classifi-cation Machine learning Spiking neural network Systolic array Computer Science Applications Control and Systems Engineering Electrical and Electronic Engineering Modeling and Simulation
This paper introduces a low-power 90nm CMOS binary weight spiking neural network (BW-SNN) ASIC for real-time image classification. The chip maximizes data reuse through systolic arrays that house the entire 5-layer BW-SNN, requiring a minimum off-chip bandwidth for data access. The chip achieves 97.57% accuracy for real-time bottled-drink recognition, consuming only 0.62uJ per inference. For comparison purpose, it achieves 98.73% accuracy for MNIST hand-written character recognition, consuming only 0.59uJ per inference. The bottled-drink recognition is demonstrated at 300 fps that is well enough for many other real-time applications. The peak efficiency point is 103.14TOPS/W at a voltage of 0.6V, which outperforms other designs so far as we know. By normalizing to the 28nm technology node, the proposed ASIC is about 5× more efficient and 7× lower hardware cost as compared with the state-of-the-art designs.

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