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A 94GHz duobinary keying wireless transceiver in 65nm CMOS
Conference paper

A 94GHz duobinary keying wireless transceiver in 65nm CMOS

Yu-Lun Chen, Chiro Kao, Pen-Jui Peng and Jri Lee
IEEE Symposium on VLSI Circuits, Digest of Technical Papers, 6858417
2014

Abstract

Electronic Optical and Magnetic Materials Electrical and Electronic Engineering
This work introduces a 94GHz duobinary keying wireless transceiver for point-to-point communications. It presents bandwidth efficiency twice as much as an OOK system and requires no carrier recovery and baseband circuitry to reduce power consumption. Designed and fabricated in 65nm CMOS, the transceiver achieves a 2.0-Gb/s data link with BER < 10 <sup>-9</sup> while consuming a total power of 265mW. © 2014 IEEE.

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