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A Folded Locking Scheme for the Long-Range Delay Block in a Wide-Range DLL
Conference paper

A Folded Locking Scheme for the Long-Range Delay Block in a Wide-Range DLL

Yu-Chi Wei and Shi-Yu Huang
Proceedings - International SoC Design Conference 2018, ISOCC 2018, pp.90-91
02/2019
DOI: https://doi.org/10.1109/ISOCC.2018.8649933

Abstract

Cell-based DLL Delay Line Folding Architecture Long-Range Delay Block Hardware and Architecture Electrical and Electronic Engineering Electronic Optical and Magnetic Materials
In this work, we present a long-range delay block for a wide range DLL supporting clock rates from 10MHz to 1GHz. The main contribution is a fast-locking scheme that quickly decides the control code of the delay block using a folded scheme. Post-layout simulation using a 90nm CMOS process has demonstrated that the locking time can he slashed dramatically.

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