- Title
- A Logic-Compatible 2T Gain-Cell eDRAM in 40-nm CMOS Process
- Creators - without role
- 秉璇 謝
- Identifiers
- 9957777353606774
- Academic Unit
- Department of Electrical Engineering, College of Electrical Engineering and Computer Science, National Tsing Hua University
- Language
- English
- Resource Type
- Conference paper
Conference paper
A Logic-Compatible 2T Gain-Cell eDRAM in 40-nm CMOS Process
06/2025
Appears in Publications (2025–Present)
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