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A Low Power and High Performance EBCOT Architecture of JPEG2000 Encoding
Conference paper

A Low Power and High Performance EBCOT Architecture of JPEG2000 Encoding

Tien-Wei Hsieh and Youn-Long Lin
ResearchGate 15th VLSI Design/CAD Symposium, p.130
2004

Abstract

Embedded Block Coding;ARCHITECTURE;ENCODING;JPEG2000
We propose an architecture for Tier-1 of Embedded Block Coding With Optimized Truncation (EBCOT) in the JPEG2000 standard. The architecture is composed of a 16-bit parallel context generator and a 4-stage pipelined binary arithmetic encoder. The former is e achieved 6% within the optimal.?ڿ

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