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A Novel Dual Synchronous Reference Frame Phase Locked Loop for Rapid Detection of Grid Variables
Conference paper

A Novel Dual Synchronous Reference Frame Phase Locked Loop for Rapid Detection of Grid Variables

Surya Chandra Gulipalli, Mohanraj Bellie Subramani, Srinivas Gudey and Chia-Chi Chu
Proceedings of 2021 IEEE 2nd International Conference on Smart Technologies for Power, Energy and Control, STPEC 2021
2021

Abstract

grid frequency harmonics phase-angle Phase-locked loop (PLL) Artificial Intelligence Computer Science Applications Energy Engineering and Power Technology Control and Optimization
For a fast and reliable operation of grid monitoring, protection and control systems, accurate and high-speed estimation of phase angles, frequency, and magnitude of a grid voltage is highly necessary. To achieve this purpose versatile synchronization devices had been developed by various researchers over the years. Of all these, Phase locked loop(PLL) gained special attention owing to their advantages. In recent years, there have been many attempts to design more advanced and sophisticated PLLs for three-phase applications to cope up with technological requirements of smart grid applications. This paper focuses on improving the speed of PLLs by using Dual Synchronous Reference Frame (DSRF-PLL) unlike the traditional single synchronous Reference Frame PLL (SRF-PLL). The proposed method tracked the parameter under variation in a spectacular manner without any overshoots and a very minimal transient effects on other parameters. Experimental results had shown that in applications with harmonic free environments this system is highly recommendable. In the presence of harmonics, a multiple delayed signal cancellation (MDSC) based pre-filter is found to be more advantageous.

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