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A ReRAM-based single-NVM nonvolatile flip-flop with reduced stress-time and write-power against wide distribution in write-time by using self-write-termination scheme for nonvolatile processors in IoT era
Conference paper

A ReRAM-based single-NVM nonvolatile flip-flop with reduced stress-time and write-power against wide distribution in write-time by using self-write-termination scheme for nonvolatile processors in IoT era

Chieh-Pu Lo, Wei-Hao Chen, Zhibo Wang, Albert Lee, Kuo-Hsiang Hsu, Fang Su, Ya-Chin King, Chrong Jung Lin, Yongpan Liu, Huazhong Yang, …
Technical Digest - International Electron Devices Meeting, IEDM, pp.16.3.1-16.3.4
01/2017
DOI: https://doi.org/10.1109/IEDM.2016.7838430
Appears in  keyword about Physics

Abstract

Electronic Optical and Magnetic Materials Condensed Matter Physics Materials Chemistry Electrical and Electronic Engineering
Recent nonvolatile flip-flops (nvFFs) enable the parallel movement of data locally between flip-flops (FFs) and nonvolatile memory (NVM) devices for faster system power off/on operations. The wide distribution and long period in NVM-write times of previous two-NVM-based nvFFs result in excessive store energy (Es) and over-write induced reliability degradation for NVM-write operations. This work proposes an nvFF using a single NVM (1R) with self-write-termination (SWT), capable of reducing E S by 27+x and avoid over-write operations. In fabricated 65nm ReRAM nvProcessor testchips, the proposed SWT1R nvFFs achieved off/on operations with a 99% reduction in Es and 2.7ns SWT latency (T SWT ). For the first time, an nvFF with single NVM device is presented.

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