Abstract
VLSI-Redundancy removal is an important operation in combinational logic optimization. Traditional redundancy identification algorithms are based on automatic test pattern generation algorithms. However, automatic test pattern generation algorithms spend much CPU time to determine if a fault on a wire is untestable, and thus redundant. To determine if a wire is redundant is not easy, however, to determine if a wire is irredundant is much easier. In this paper, we present an efficient redundancy identifier such that irredundant wires can be easily filtered out. The experimental results show that the presented method can identify all irredundant wires in most benchmark circuits.