Abstract
A W-band frequency doubler is proposed and demonstrated in a 90-nm CMOS technology. Differential output signals are obtained at the drain and source terminals with validated phase balance, which is seldom demonstrated in high frequency operations above 67 GHz. The input network of the circuit exhibits diverse reflections for the fundamental and second harmonic frequencies with respect to the doubler, enhancing the first harmonic rejection ratio better than 30 dB. The proposed frequency doubler shows a differential conversion gain of-8.6 dB with a 3-dB bandwidth from 91 to 109 GHz. A maximum output power larger than-5 dBm is measured to provide a sufficient power level as the local frequency signal in the transceiver design.