Abstract
In this paper, an efficient advanced RISC machine (ARM)-based system-on-chip (SoC) testbed for a multiinput multi-output orthogonal frequency division multiple access (MIMO-OFDMA) uplink transceiver is presented. To mitigate carrier frequency offset (CFO) and multipath channel impairments, low complexity architecture of an inter-carrier interference (ICI)-cancellation- based CFO estimator and a 2D channel tracker are proposed in the receiver. The proposed transceiver is integrated into the SoC platform and verified by a video codec. Moreover, the proposed testbed provides a fast and configurable HW/SW co-verification prototyping for single-input single-output (SISO)/MIMO-OFDMA systems. ©2009 IEEE.