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A distributed timing synchronization technique for parallel multi-core instruction-set simulation
Conference paper   Peer reviewed

A distributed timing synchronization technique for parallel multi-core instruction-set simulation

Meng-Huan Wu, Cheng-Yang Fu, Peng-Chih Wang and Ren-Song Tsay
Transactions on Embedded Computing Systems, Vol.12(SUPPL1), 54
03/2013

Abstract

And instruction-set simulation Distributed synchronization Multi-core simulation Timing synchronization
As multi-core architecture has become the mainstream, the corresponding multi-core instruction-set simulation (MCISS) is also needed to aid system development. Ideally, we may run a MCISS in parallel to enhance the simulation speed. However, the conventional centralized timing synchronization mechanism would greatly constrain the parallelism of a MCISS, so the simulation speed is bounded. To resolve this issue, we propose a new distributed timing synchronization technique which allows higher parallelism for a MCISS. Hence, it accelerates the simulation speed by 9 to 20 times as the number of cores increases in contrast to the centralized synchronization approach. © 2013 ACM.

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