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A high-parallelism distributed scheduling mechanism for multi-core instruction-set simulation
Conference paper

A high-parallelism distributed scheduling mechanism for multi-core instruction-set simulation

Meng-Huan Wu, Peng-Chih Wang, Cheng-Yang Fu and Ren-Song Tsay
Proceedings - Design Automation Conference, pp.339-344
2011

Abstract

Instruction-set simulator Multi-core simulation Parallel simulation Timing synchronization
Ideally, multi-core instruction-set simulation should run in parallel to improve simulation performance. However, the conventional low-parallelism centralized scheduler greatly constrains simulation performance. To resolve this issue, we propose a high-parallelism distributed scheduling mechanism. The experimental results show that our proposed approach accelerates simulation by 6 to 20 times, depending on the number of cores. © 2011 ACM.

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