A high-throughput VLSI design for 2-D FIR digital filtering

Conference paper

Wang Chin-Liang, Yuan Ren-Min and Peng Hsiu-Lin

Proceedings of the Fourth VLSI Design/CAD Workshop, p.77

1993

Abstract

high-throughput;VLSI;FIR;digital filtering

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Title: A high-throughput VLSI design for 2-D FIR digital filtering
Creators - without role: Wang Chin-Liang - 國立清華大學電機資訊學院電機工程學系
Yuan Ren-Min
Peng Hsiu-Lin
Publication Details: Proceedings of the Fourth VLSI Design/CAD Workshop, p.77
Identifiers: 9957774077906774
Academic Unit: Institute of Communications Engineering, College of Electrical Engineering and Computer Science, National Tsing Hua University
Language: Traditional Chinese
Resource Type: Conference paper