A joint project to develop a VLSI testing and design for testability course for universities in Taiwan

Conference paper

C.-L. Lee, J.-Y. Jou, C.-S. Lin, J.-E. Chen, C.-W. Wu, K.-J. Lee and C.-C. Su

Proc. Int. Conf. on Engineering Education (ICEE), Vol.II, pp.43-53

08/1997

Abstract

VLSI;Testability

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Title: A joint project to develop a VLSI testing and design for testability course for universities in Taiwan
Creators - without role: C.-L. Lee
J.-Y. Jou
C.-S. Lin
J.-E. Chen
C.-W. Wu
K.-J. Lee
C.-C. Su
Publication Details: Proc. Int. Conf. on Engineering Education (ICEE), Vol.II, pp.43-53
Identifiers: 9957776727706774
Academic Unit: College of Electrical Engineering and Computer Science, National Tsing Hua University
Language: Traditional Chinese
Resource Type: Conference paper