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A low-cost realization of multiple-input exclusive-OR gates
Conference paper

A low-cost realization of multiple-input exclusive-OR gates

K.-J. Lin and C.-W. Wu
Proceedings of Eighth International Application Specific Integrated Circuits Conference, pp.307-310
09/1995

Abstract

Circuit testing;Inverters;Voltage;CMOS logic circuits;Delay effects;Power dissipation;Power generation economics;Costs;Adders;Detectors
Several efficient CMOS two-input exclusive-OR (XOR) logic structures have been reported in the past. Based on these XOR gates, we propose two multiple-input XOR circuit configurations, which are smaller, faster, and run at a lower power level than conventional structures formed by directly connecting two-input XOR gates. For exclusive-OR sum-of-products circuits, four transistors can be saved for each product term.

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