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A new manufacturing method of CMOS logic compatible 1T-CRRAM
Conference paper

A new manufacturing method of CMOS logic compatible 1T-CRRAM

Hung-Yu Chen, Hsien-Hao Chen, Yun-Feng Kao, Ping-Yu Chen, Ya-Chin King and Chrong Jung Lin
2016 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016, 7480498
05/2016

Abstract

Hardware and Architecture Electrical and Electronic Engineering
This study proposed a new manufacturing method for improving the fabrication yield of CRRAM in advanced 90nm CMOS logic process. The original CMOS compatible CRRAM is proposed to fabricate by the thickness and size control of contact etch process. Due to the variation of contact hole etch on different ILD topographies, the remained RRAM's TMO could result in uniformity and yield problems of memory arrays. In order to decline the production variation, a new refilling Contact RRAM process is firstly proposed and demonstrated in this paper.

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