Abstract
This work reports a new wafer-level post-CMOS process with double-side DRIE for fabricating high-sensitivity, thermally stable capacitive accelerometers. The resultant sensor structures have high aspect ratio (beams with 2.5 μm gaps and 56.2 μm beam thickness comprising 5 μm metal-oxide layers and 51.2 μm single-crystal silicon layer) and show the insensitivity to residual stress and temperature change. Moreover, this method avoids the charge damage problem during the dry-etching procedure. For demonstration, an accelerometer sensor was fabricated by using the proposed process and was integrated with an on-chip sensing circuit in commercial 0.35 μm 2P4M CMOS process. High detection sensitivity of 595 mV/g and low thermal variation of 1.68 mg/°C were achieved. © 2011 IEEE.