Abstract
Hold-time violation is a common cause of failure at scan chains. A robust new paradigm for diagnosing such failure is presented in this papist. As compared to previous methods, the major advantage of ours is the ability to tolerate non-ideal conditions, e.g., under the presence of certain core logic faults or for those faults that manifest themselves intermittently. We first formulate the diagnosis problem as a delay Insertion process. Then, two algorithms including a greedy algorithm and a so-called best-alignment based algorithm will be proposed. Experimental results on a number of real designs are presented to demonstrate its effectiveness. © 2006 IEEE.