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A nonlinear phase detector for digital phase locked loops
Conference paper

A nonlinear phase detector for digital phase locked loops

Ping-Hsuan Hsieh, Jay Maxey and Chih-Kong Ken Yang
Proceedings of the Custom Integrated Circuits Conference, pp.335-338
2009

Abstract

Digital phase-locked loop Phase detector Time-to-digital converter
This paper examines several transfer curves of the phase detector in a digital phase-locked loop and illustrates the benefits of applying non-linearity to the phase transfer characteristics. Taking advantage of the programmability of the digital implementation, the proposed technique shows a better trade-off between the acquisition speed and the steady-state dithering jitter performance. © 2009 IEEE.

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