Abstract
By CIEF CBCM, a novel CBCM method free from the errors induced by charge-injection, it is the first time to investigate into the impact of floating dummy-fills on interconnect capacitance in practice. The impact of floating dummy-fills is confirmed to play an important role on successful circuit design. Besides, a guideline to optimize the chip performance and minimize the crosstalk by dummy pattern design is also proposed in this paper. © 2005 IEEE.