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A novel algorithm and architecture for high speed pattern matching in resource-limited silicon solution
Conference paper

A novel algorithm and architecture for high speed pattern matching in resource-limited silicon solution

Nen-Fu Huang, Yen-Ming Chu, Chi-Hung Tsai, Chen-Ying Hsieh and Yih-Jou Tzang
IEEE International Conference on Communications, pp.1286-1291
2007

Abstract

DFA Intrusion detection Network security NIDS String matching
Network Intrusion Detection Systems (NIDS) are more and more important for identifying and preventing the malicious attacks over the network. This paper proposes a novel cost-effective high speed pattern matching algorithm (named MSH) for NIDS. By applying the characteristics of magic states, a new observation from the deterministic finite state automata (DFA), the proposed MSH constructs a tiny data structure which can be stored into the on-chip memory of modern cost effective FPGA. Prototype and experimental results show the overall efficiency of the proposed MSH is at least 7 times faster than that of the baseline model. The MSH enables the design of cost effective FPGA-based accelerator to furnish over 1Gbps throughput. It can also be scaled to multi-gigabit and realized on various silicon implementations. © 2007 IEEE.

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