Abstract
Due to process limitations, wiring rules are imposed by foundries on chip layout. Under nanometer wiring rules, the required separation between two wire ends is dependent on their surrounding wires, and there is a limit on the minimum length of each wire segment. Yet, traditional maze routing algorithms are not designed to handle these rules, so rule violations are corrected by post-processing and the quality of result is seriously impacted. For this reason, we propose a new maze routing algorithm capable of handling these wiring rules. The proposed algorithm is proved to find a legal shortest path with time complexity of O(n), where n is the number of grid points. Experiments with seven tight industrial cases show that the runtime of a commercial router is reduced by 2.4 times and the total wire length is also reduced by 3% on average. © 2013 IEEE.