Abstract
Sub-40nm body-tied FinFET BE-SONOS NAND Flash is studied extensively. BE-SONOS offers efficient hole tunneling erase and excellent data retention. When integrated into a FinFET structure, the inherent field enhancement (FE) effect around the fin tip provides very faster program/erase speed. However, the non-uniform injection around the fin also greatly complicates the operation of FinFET BE-SONOS. In this work, the switching mechanisms at the fin tip, sidewall and bottom corner are examined in detail, thus providing insights to optimize the FinFET geometry. For the first time, we demonstrate that the ISPP together with self-boosting program-inhibit methods provide excellent Vt distribution control for MLC application for a FinFET CT device. ©2008 IEEE.