Abstract
Battery-powered edge-AI devices require nonvolatile computing-in-memory (nvCIM) macros for nonvolatile data storage and multiply-and-accumulate (MAC) operations. High inference accuracy requires MAC operations with high input (IN), weight (W), and output (OUT) precisions. A high energy efficiency (EF_MAC) and a short computing latency (t_AC) are also required. Most existing silicon-verified nvCIM macros use current-mode signal generation; using current [1]-[3] or hybrid current-voltage readout schemes [4]-[5] for multibit MAC operations to compensate for the small BL -voltage swing and signal margin resulting from the low read-disturb-free voltage (V_RD).