An (8176,7156) EG-LDPC Decoder Using Vertical Shuffled Scheduling and Early Termination

Conference paper

Cheng-Yu Weng, Chun-Jung Chen, Yeong-Luh Ueng, Chung-Jay Yang, Jen-Yuan Hsu and Pangan Ting

2010 VLSI Design/CAD Symposium

2010

Abstract

EG-LDPC;Vertical Shuffled Scheduling;Early Termination

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Title: An (8176,7156) EG-LDPC Decoder Using Vertical Shuffled Scheduling and Early Termination
Creators - without role: Cheng-Yu Weng
Chun-Jung Chen
Yeong-Luh Ueng - 國立清華大學電機資訊學院電機工程學系
Chung-Jay Yang
Jen-Yuan Hsu
Pangan Ting
Identifiers: 9957766919806774
Academic Unit: Institute of Communications Engineering, College of Electrical Engineering and Computer Science, National Tsing Hua University
Language: Traditional Chinese
Resource Type: Conference paper
Publication Details: 2010 VLSI Design/CAD Symposium