Abstract
This paper proposes an area-efficient serial DAC, namely serial-differential serial DAC (SDS-DAC). To compose a differential DAC, a serial DAC with complementary switching requires four capacitors, two sample-And-hold circuits, and two averaging circuits. In this design, only four capacitors are necessary to perform the functions of D/A conversion and mismatch compensation. The chip measurement results show that the proposed serial DAC can achieve 10-bit accuracy even when the variation on the common mode voltage is 1 mV.