Abstract
We present a high-performance hardware architecture for H.264/AVC full-mode intra-frame encoding. We propose a novel method to alleviate performance bottleneck caused by the long data dependency loop among 4×4 blocks. Synthesized into a TSMC 0.13 μm CMOS cell library, our design takes 212K gates to run at 138MHz and is able to real-time encode 1080HD (1920×1088) video sequences at 30 frames per second (fps). Compared with all state-of-theart designs, our design needs lower working frequency, supports high resolution up to 1080HD and achieves better bit-rate saving. © 2008 IEEE.