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An analog probabilistic spiking neural network with on-chip learning
Conference paper   Peer reviewed

An analog probabilistic spiking neural network with on-chip learning

Hung-Yi Hsieh, Pin-Yi Li and Kea-Tiong Tang
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Vol.10639 LNCS, pp.777-785
2017

Abstract

Analog implementation On-Chip learning Probabilistic spiking neural network (PSNN) Theoretical Computer Science Computer Science (all)
Portable or biomedical applications typically require signal processing, learning, and classification in conditions involving limited area and power consumption. Analog implementations of learning algorithms can satisfy these requirements and are thus attracting increasing attention. Probabilistic spiking neural network (PSNN) is a hardware friendly algorithm that is relax in weight resolution requirements and insensitive to noise and VLSI process variation. In this study, the probabilistic spiking neural network was implemented using analog very-large-scale integration (VLSI) to verify their hardware compatibility. The circuit was fabricated using 0.18 μm CMOS technology. The power consumption of the chip was less than 10 μW with a 1 V supply and the core area of chip was 0.43 mm 2 . The chip can classify the electronic nose data with 92.3% accuracy and classify the electrocardiography data with 100% accuracy. The low power and high learning performance features make the chip suitable for portable or biomedical applications.

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