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An efficient hybrid synchronization technique for scalable multi-core instruction set simulations
Conference paper

An efficient hybrid synchronization technique for scalable multi-core instruction set simulations

Bo-Han Zeng, Ren-Song Tsay and Ting-Chi Wang
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, pp.588-593
2013

Abstract

Multi-core Instruction-set simulator Timing Synchronization
Multi-core system simulation techniques have been especially essential to system development in recent years. Although these techniques have been studied extensively, we have found that both conventional polling and collaborative timing synchronization approaches all encounter a severe scalability issue when the number of target cores is more than that of the host cores. To resolve this issue, we propose an effective hybrid technique that combines the advantage of the two approaches. According to the experimental results, the proposed technique effectively resolves the scalability issue and shows one to four orders of improvement compared to conventional approaches. © 2013 IEEE.

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