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Automatic generation of high-speed accurate TLM Models for out-of-order pipelined bus
Conference paper   Peer reviewed

Automatic generation of high-speed accurate TLM Models for out-of-order pipelined bus

Chen-Kang Lo, Mao-Lin Li, Li-Chun Chen, Yi-Shan Lu, Ren-Song Tsay, Hsu-Yao Huang and Jen-Chieh Yeh
Transactions on Embedded Computing Systems, Vol.13(1 SUPPL.), 37
11/2013

Abstract

Electronic system-level (ESL) design On-chip bus SystemC Transaction-level modeling (TLM)
Although pipelined/out-of-order (PL/OO) execution features are commonly supported by the state-of-the-art bus designs, no existingmanual Transaction-Level-Modeling (TLM) approaches can effectively construct fast and accurate simulation models for PL/OO buses. Mainly, the inherent high design complexity of concurrent PL/OO behaviorsmakes themanual approaches tedious and error-prone. To tackle the complicated modeling task, this article presents an automatic approach that performs systematic abstraction and generation of fast-and-accurate simulation models. The experimental results show that our approach reduces 21 times modeling efforts, while our generated models perform simulation an order of magnitude faster than Cycle- Accurate models with the same PL/OO transaction execution cycle counts preserved. Categories and Subject Descriptors: I.6.5 [Simulation and Modeling]: Model Development-Modeling methodologies; J.6 [Computer Applications]: Computer-aided Engineering-Computer- aided design (CAD); I.6.4 [Simulation and Modeling]: Model Validation and Analysis; C.4 [Computer Systems Organization]: Performance of Systems-Modeling techniques, Measurement techniques. © 2013 ACM 1539-9087/2013/11-ART37 $15.00.

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