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Block pipeline 2-D IIR filter structures via iteration and retiming
Conference paper

Block pipeline 2-D IIR filter structures via iteration and retiming

Cheng Wen Wu
Proceedings - IEEE International Symposium on Circuits and Systems, Vol.1, pp.731-734
1990

Abstract

Electrical and Electronic Engineering Electronic Optical and Magnetic Materials
Systolic arrays are presented for real-time 2-D infinite impulse response (IIR) filters, based on the transfer function model. Two-dimensional iteration and retiming techniques are depicted to illustrate block pipelining algorithms, which guarantee high-throughput operation for real-time applications. The systolic realizations are more regular and much faster than the previously published designs. All broadcast data lines can be eliminated, and the arrays can be fully pipelined. The retiming approach is shown to be superior to the iteration method. Examples are given for first- and second-order filters.

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