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CAMEL: An efficient fault simulator with coupling fault simulation enhancement for CAMs
Conference paper

CAMEL: An efficient fault simulator with coupling fault simulation enhancement for CAMs

Hsiang-Huang Wu, Jin-Fu Li, Chi-Feng Wu and Cheng-Wen Wu
Proceedings of the Asian Test Symposium, pp.355-360
2007

Abstract

Electrical and Electronic Engineering
Content addressable memories (CAMs) are widely used in digital systems. A test algorithm for CAMs must be able to cover the random access memory (RAM) faults and comparison faults. However, CAM circuits are usually customized for different products, so there are no standard tests, i.e., tests should be adapted to a specific design manufactured using specific technology. This paper presents a fault simulator, called CAM Evaluation tooL (CAMEL), for the evaluation of fault coverage of CAM test algorithms. It supports five common functional outputs, i.e., Data I/O, hit, multi-hit, matchout, and priority address for various CAM specifications. Since coupling fault simulation dominates the efficiency of a memory fault simulator, a concept of observability is proposed to simplify the coupling fault behavior. By exploiting the observability, a compression technique is also proposed to speed up the fault simulation and reduce memory usage. CAMEL can support both RAM faults and comparison faults. We have demonstrated the CAMEL using widely-used March tests and CAM tests. Simulation results show that the CAMEL can evaluate the fault coverage of tests accurately and efficiently. © 2007 IEEE.

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