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Challenges in Circuit Designs of Nonvolatile-memory based computing-in-memory for AI Edge Devices
Conference paper

Challenges in Circuit Designs of Nonvolatile-memory based computing-in-memory for AI Edge Devices

Cheng-Xin Xue and Meng-Fan Chang
Proceedings - 2019 International SoC Design Conference, ISOCC 2019, pp.164-165
10/2019
DOI: https://doi.org/10.1109/ISOCC47750.2019.9027656

Abstract

Artificial intelligence CIM computing-in-memory Nonvolatile-memory nvCIM NVM Signal Processing Electrical and Electronic Engineering Instrumentation Artificial Intelligence Hardware and Architecture
The 'memory wall' imposed by the von-Neumann computer architecture limits the bandwidth between the processor and memory, thereby imposing a critical bottleneck in system performance. Emerging memory devices can be used in memory macros as well as computing-in-memory for the Internet of Things (IoT) and artificial intelligence (AI) chips. In this paper, we discuss the challenges involved in the further development of nonvolatile-memory based computing-in-memory for IoT and AI chips.

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